AMulet 2.0
AIG Multiplier Verification Tool
substitution.cpp File Reference

contains function to apply adder substitution More...

#include "substitution.h"
Include dependency graph for substitution.cpp:

Functions

bool all_single_output ()
 
bool all_outputs_are_xor ()
 
bool slice_two_needs_carry_in_slice_zero ()
 
bool cin_in_slice_0 ()
 
unsigned get_input (bool flip)
 
void push_to_inputs (Gate *n)
 
void push_to_outputs (Gate *n, int i)
 
void push_to_cins (Gate *n, int i)
 
void set_carry_in (Gate *n)
 
void identify_carry_out ()
 
bool identify_propagate_and_generate_gates ()
 
void fix_inputs ()
 
bool follow_path_and_mark_gates (Gate *n, bool init)
 
bool follow_all_output_paths_and_mark_gates ()
 
void correctly_mark_inputs ()
 
bool identify_final_stage_adder ()
 
void add_original_adder ()
 
void fill_original_outputs ()
 
unsigned btor_ha (unsigned i1, unsigned i2, bool carry)
 
unsigned btor_fa (unsigned i1, unsigned i2, unsigned i3, bool carry)
 
void add_btor_adder ()
 
unsigned not_ (unsigned a)
 
unsigned and_ (unsigned a, unsigned b)
 
unsigned implies_ (unsigned a, unsigned b)
 
unsigned xnor_ (unsigned a, unsigned b)
 
bool build_miter ()
 
bool build_adder_miter ()
 
bool miter_to_file (FILE *file)
 
bool trivial_miter_to_file (FILE *file)
 
void generate_rewritten_aig ()
 

Variables

unsigned aig_idx
 
bool no_cin
 
bool single_gen_gate
 
static Gatecarry_out
 
static Gatecarry_in
 
static std::vector< Gate * > outputs
 
static std::vector< unsigned > original_outputs
 
static std::vector< unsigned > rewritten_outputs
 
static std::vector< Gate * > inputs
 
static std::list< unsigned > plain_inputs
 
static std::vector< Gate * > c_ins
 

Detailed Description

contains function to apply adder substitution

Part of AMulet2.0 : AIG Multiplier Verification Tool. Copyright (C) 2020 Daniela Kaufmann, Johannes Kepler University Linz

Function Documentation

void add_btor_adder ( )

Generates a ripple-carry adder using the inputs, stored in the inputs vector. The outpus of this adder are added to the rewritten_outputs

void add_original_adder ( )

Adds the identified final stage adder to the miter

bool all_outputs_are_xor ( )

Checks whether all AIG outputs are XOR gates

Returns
True if all outputs in slices 1 to NN-2 are XOR gates
bool all_single_output ( )

Checks whether all AIG outputs are used only once

Returns
True if all AIG outputs are single gates
unsigned and_ ( unsigned  a,
unsigned  b 
)

Generates an AIG gate with inputs a and b

Parameters
aunsigned integer
bunsigned integer
Returns
the value of the output gate
unsigned btor_fa ( unsigned  i1,
unsigned  i2,
unsigned  i3,
bool  carry = 1 
)

Generates an AIG of a half-adder with inputs i1, i2 and i3. These are added to the rewritten AIG as well as to the miter.

Parameters
i1unsigned, input 1 of the full adder
i2unsigned, input 2 of the full adder
i3unsigned, input 3 of the full adder
carrybool indicating whether we add the carry of the full-adder to the rewritten_outputs
Returns
the sum output if carry = 0, and the carry output if carry = 1
unsigned btor_ha ( unsigned  i1,
unsigned  i2,
bool  carry = 1 
)

Generates an AIG of a half-adder with inputs i1 and i2. These are added to the rewritten AIG as well as to the miter.

Parameters
i1unsigned, input 1 of the half adder
i2unsigned, input 2 of the half adder
carrybool indicating whether we add the carry of the half-adder to the rewritten_outputs
Returns
the sum output if carry = 0, and the carry output if carry = 1
bool build_adder_miter ( )

Routine to generate the miter aig

Returns
True if all checks succeeded
bool build_miter ( )

Builds the miter, where the the original_outputs and the rewritten_outputs are combined elementwise using a sequence of xnor gates

Returns
True if all checks succeeded
bool cin_in_slice_0 ( )

Checks whether the output of slice 0 is a possible carry-in for the final stage adder

Returns
True if output of slice 0 has more than one parent.
void correctly_mark_inputs ( )

For all input gates we count how often they are used as inputs in the final stage adder.

void fill_original_outputs ( )

A vector called original_outputs is filled by the outputs of the final stage adder. These gates are then later used, when the miter is generated.

void fix_inputs ( )

For some multipliers we have to adjust the inputs, because they are sometimes propagate or generate gate themselves.

bool follow_all_output_paths_and_mark_gates ( )

Calls follow_path_and_mark_gates for all identified output gates of the final stage adder.

Returns
True if all checks succeeded
bool follow_path_and_mark_gates ( Gate n,
bool  init = 0 
)

Follow all paths from the gate n and check that we stop at the identified inputs and carry-in of the final stage adder. All gates that are seen on the way are marked to belong to the final stage adder.

Parameters
nGate* pointing to root gate, from which we start the checks
initbool indicating whether we started from the carry out
Returns
True if all checks succeeded
void generate_rewritten_aig ( )

Generates the rewritten aig by adding all gates that are not marked as the final stage adder. The gates of the ripple carry adder have been already added in add_btor_adder.

unsigned get_input ( bool  flip = 0)

Returns the aiger value of last element of the inputs vector

Parameters
flipindicates whether the input has to be negated
Returns
unsigned
void identify_carry_out ( )

Identifies the carry out of the final stage adder

bool identify_final_stage_adder ( )

Routine for identifying the final stage adder

Returns
True if all checks succeeded
bool identify_propagate_and_generate_gates ( )

Identifies the propagate and generate gates of the final stage adder

Returns
True if all checks succeeded
unsigned implies_ ( unsigned  a,
unsigned  b 
)

Generates AIG gates for a implies b, using and_ and not_

Parameters
aunsigned integer
bunsigned integer
Returns
the value of the output gate
bool miter_to_file ( FILE *  file)

Translate the miter aig to CNF and prints it to the file

Parameters
fileOutput file
Returns
True if all checks succeeded
unsigned not_ ( unsigned  a)

Flips the last bit of a to negate the unsigned integer as used in the aiger format

Parameters
aunsigned integer
Returns
the negated aiger value of a
void push_to_cins ( Gate n,
int  i 
)

Adds the gate n to the cins vector and sets it's slice to i

Parameters
nGate* to be pushed
iinteger indicating the slice index
void push_to_inputs ( Gate n)

Adds the gate n to the inputs vector

Parameters
nGate* to be pushed
void push_to_outputs ( Gate n,
int  i 
)

Adds the gate n to the outputs vector and sets it's slice to i

Parameters
nGate* to be pushed
iinteger indicating the slice index
void set_carry_in ( Gate n)

Sets the gate n to the carry_in of the final stage adder

Parameters
nGate*
bool slice_two_needs_carry_in_slice_zero ( )

If the output of slice 2 has more than 3 parents, than the carry-in of the final stage is the output of slice 0 (in the aoki benchmarks.)

Returns
False if output of slice 2 has more than 3 parents but output of slice 0 is single gate
bool trivial_miter_to_file ( FILE *  file)

Prints the trivial CNF "a and not a" to the file

Parameters
fileOutput file
Returns
True if all checks succeeded
unsigned xnor_ ( unsigned  a,
unsigned  b 
)

Generates AIG gates for a xnor b, using implies_ and and_

Parameters
aunsigned integer
bunsigned integer
Returns
the value of the output gate

Variable Documentation

unsigned aig_idx
std::vector<Gate*> c_ins
static
Gate* carry_in
static
Gate* carry_out
static
std::vector<Gate*> inputs
static
bool no_cin
std::vector<unsigned> original_outputs
static
std::vector<Gate*> outputs
static
std::list<unsigned> plain_inputs
static
std::vector<unsigned> rewritten_outputs
static
bool single_gen_gate