#include <vector>
#include "gate.h"
Go to the source code of this file.
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bool | all_single_output () |
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bool | all_outputs_are_xor () |
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bool | slice_two_needs_carry_in_slice_zero () |
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bool | cin_in_slice_0 () |
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unsigned | get_input (bool flip=0) |
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void | push_to_inputs (Gate *n) |
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void | push_to_outputs (Gate *n, int i) |
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void | push_to_cins (Gate *n, int i) |
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void | set_carry_in (Gate *n) |
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void | identify_carry_out () |
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bool | identify_propagate_and_generate_gates () |
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void | fix_inputs () |
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bool | follow_path_and_mark_gates (Gate *n, bool init=0) |
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bool | follow_all_output_paths_and_mark_gates () |
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void | correctly_mark_inputs () |
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bool | identify_final_stage_adder () |
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void | add_original_adder () |
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void | fill_original_outputs () |
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unsigned | btor_ha (unsigned i1, unsigned i2, bool carry=1) |
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unsigned | btor_fa (unsigned i1, unsigned i2, unsigned i3, bool carry=1) |
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void | add_btor_adder () |
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unsigned | not_ (unsigned a) |
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unsigned | and_ (unsigned a, unsigned b) |
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unsigned | implies_ (unsigned a, unsigned b) |
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unsigned | xnor_ (unsigned a, unsigned b) |
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bool | build_miter () |
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bool | build_adder_miter () |
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bool | miter_to_file (FILE *file) |
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bool | trivial_miter_to_file (FILE *file) |
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void | generate_rewritten_aig () |
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Generates a ripple-carry adder using the inputs, stored in the inputs vector. The outpus of this adder are added to the rewritten_outputs
void add_original_adder |
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Adds the identified final stage adder to the miter
bool all_outputs_are_xor |
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Checks whether all AIG outputs are XOR gates
- Returns
- True if all outputs in slices 1 to NN-2 are XOR gates
bool all_single_output |
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Checks whether all AIG outputs are used only once
- Returns
- True if all AIG outputs are single gates
unsigned and_ |
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unsigned |
a, |
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unsigned |
b |
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Generates an AIG gate with inputs a and b
- Parameters
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a | unsigned integer |
b | unsigned integer |
- Returns
- the value of the output gate
unsigned btor_fa |
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unsigned |
i1, |
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unsigned |
i2, |
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unsigned |
i3, |
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bool |
carry = 1 |
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Generates an AIG of a half-adder with inputs i1, i2 and i3. These are added to the rewritten AIG as well as to the miter.
- Parameters
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i1 | unsigned, input 1 of the full adder |
i2 | unsigned, input 2 of the full adder |
i3 | unsigned, input 3 of the full adder |
carry | bool indicating whether we add the carry of the full-adder to the rewritten_outputs |
- Returns
- the sum output if carry = 0, and the carry output if carry = 1
unsigned btor_ha |
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unsigned |
i1, |
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unsigned |
i2, |
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bool |
carry = 1 |
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Generates an AIG of a half-adder with inputs i1 and i2. These are added to the rewritten AIG as well as to the miter.
- Parameters
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i1 | unsigned, input 1 of the half adder |
i2 | unsigned, input 2 of the half adder |
carry | bool indicating whether we add the carry of the half-adder to the rewritten_outputs |
- Returns
- the sum output if carry = 0, and the carry output if carry = 1
bool build_adder_miter |
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Routine to generate the miter aig
- Returns
- True if all checks succeeded
Builds the miter, where the the original_outputs and the rewritten_outputs are combined elementwise using a sequence of xnor gates
- Returns
- True if all checks succeeded
Checks whether the output of slice 0 is a possible carry-in for the final stage adder
- Returns
- True if output of slice 0 has more than one parent.
void correctly_mark_inputs |
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For all input gates we count how often they are used as inputs in the final stage adder.
void fill_original_outputs |
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A vector called original_outputs is filled by the outputs of the final stage adder. These gates are then later used, when the miter is generated.
For some multipliers we have to adjust the inputs, because they are sometimes propagate or generate gate themselves.
bool follow_all_output_paths_and_mark_gates |
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Calls follow_path_and_mark_gates for all identified output gates of the final stage adder.
- Returns
- True if all checks succeeded
bool follow_path_and_mark_gates |
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Gate * |
n, |
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bool |
init = 0 |
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Follow all paths from the gate n and check that we stop at the identified inputs and carry-in of the final stage adder. All gates that are seen on the way are marked to belong to the final stage adder.
- Parameters
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n | Gate* pointing to root gate, from which we start the checks |
init | bool indicating whether we started from the carry out |
- Returns
- True if all checks succeeded
void generate_rewritten_aig |
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Generates the rewritten aig by adding all gates that are not marked as the final stage adder. The gates of the ripple carry adder have been already added in add_btor_adder.
unsigned get_input |
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bool |
flip = 0 | ) |
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Returns the aiger value of last element of the inputs vector
- Parameters
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flip | indicates whether the input has to be negated |
- Returns
- unsigned
void identify_carry_out |
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Identifies the carry out of the final stage adder
bool identify_final_stage_adder |
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Routine for identifying the final stage adder
- Returns
- True if all checks succeeded
bool identify_propagate_and_generate_gates |
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Identifies the propagate and generate gates of the final stage adder
- Returns
- True if all checks succeeded
unsigned implies_ |
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unsigned |
a, |
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unsigned |
b |
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Generates AIG gates for a implies b, using and_ and not_
- Parameters
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a | unsigned integer |
b | unsigned integer |
- Returns
- the value of the output gate
bool miter_to_file |
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FILE * |
file | ) |
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Translate the miter aig to CNF and prints it to the file
- Parameters
-
- Returns
- True if all checks succeeded
unsigned not_ |
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unsigned |
a | ) |
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Flips the last bit of a to negate the unsigned integer as used in the aiger format
- Parameters
-
- Returns
- the negated aiger value of a
void push_to_cins |
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Gate * |
n, |
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int |
i |
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Adds the gate n to the cins vector and sets it's slice to i
- Parameters
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n | Gate* to be pushed |
i | integer indicating the slice index |
void push_to_inputs |
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Gate * |
n | ) |
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Adds the gate n to the inputs vector
- Parameters
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void push_to_outputs |
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Gate * |
n, |
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int |
i |
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Adds the gate n to the outputs vector and sets it's slice to i
- Parameters
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n | Gate* to be pushed |
i | integer indicating the slice index |
void set_carry_in |
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Gate * |
n | ) |
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Sets the gate n to the carry_in of the final stage adder
- Parameters
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bool slice_two_needs_carry_in_slice_zero |
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If the output of slice 2 has more than 3 parents, than the carry-in of the final stage is the output of slice 0 (in the aoki benchmarks.)
- Returns
- False if output of slice 2 has more than 3 parents but output of slice 0 is single gate
bool trivial_miter_to_file |
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FILE * |
file | ) |
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Prints the trivial CNF "a and not a" to the file
- Parameters
-
- Returns
- True if all checks succeeded
unsigned xnor_ |
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unsigned |
a, |
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unsigned |
b |
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Generates AIG gates for a xnor b, using implies_ and and_
- Parameters
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a | unsigned integer |
b | unsigned integer |
- Returns
- the value of the output gate