Publications Daniela Kaufmann

Some of my work is published under my maiden name 'Ritirc'.

2019

Daniela Kaufmann, Armin Biere, Manuel Kauers. Verifying Large Multipliers by Combining SAT and Computer Algebra. In Proc. 19th Intl. Conf. on Formal Methods in Computer Aided Design (FMCAD'19), pages 28-36, IEEE 2019.
[ paper | bibtex | experiments ]

Daniela Kaufmann, Manuel Kauers, Armin Biere, David Cok. Arithmetic Verification Problems Submitted to the SAT Race 2019}, In Proc. of SAT Race 2019 - Solver and Benchmark Descriptions, Marijn Heule, Matti J√§rvisalo, Martin Suda (editors), vol. B-2019-1 of Department of Computer Science Series of Publications B, pages 49, University of Helsinki, 2019.
[ paper | bibtex ]

Daniela Kaufmann, Armin Biere, Manuel Kauers. Incremental column-wise verification of arithmetic circuits using computer algebra. To be published in Formal Methods in System Design, Springer 2019.
[ preprint | experiments ]

2018

Daniela Ritirc, Armin Biere, Manuel Kauers. A Practical Polynomial Calculus for Arithmetic Circuit Verification. In Proc. 3rd Intl.  Workshop on Satisfiability Checking and Symbolic Computation (SC2'18), pages 61-76, CEUR-WS, 2018.
[ paper | bibtex | experiments ]

Daniela Ritirc, Armin Biere, Manuel Kauers. Improving and Extending the Algebraic Approach for Verifying Gate-Level Multipliers. In Proc. Design, Automation and Test in Europe (DATE'18), pages 1556-1561, IEEE 2018.
[ paper | bibtex | experiments ]

2017

Armin Biere, Manuel Kauers, Daniela Ritirc,. Challenges in Verifying Arithmetic Circuits Using Computer Algebra. In Proc. 19th Intl. Symp. on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC'17), IEEE.
[ paper | bibtex ]

Best paper
Daniela Ritirc, Armin Biere, Manuel Kauers. Column-Wise Verification of Multipliers Using Computer Algebra. In Proc. 17th Intl. Conf. on Formal Methods in Computer Aided Design (FMCAD'17), pages 23-30, IEEE 2017.
[ paper | bibtex | experiments | pictures ]