Institute for
Formal Models
and Verification
Opening for full professorship at
FMV
The Department of Computer Science at the Faculty of Engineering
and Natural Sciences at Johannes Kepler University Linz invites
applications for a permanent full-time position.
More information:
https://www.jku.at/en/the-jku/work-at-the-jku/job-openings/professorship-positions/formal-methods/
GI Dissertation Prize 2020 for Daniela
Kaufmann
Daniela
Kaufmann received the GI Dissertation Prize
2020
awarded in 2021 for her
PhD thesis jointly by the German
(GI),
Austrian (OGC), and Swiss (SI) computer science
associations.
LIT Lecture Series AI
Hardware Model Checking Competition
2020
Organized HWMCC'20
affiliated to FMCAD'20
again with focus on BTOR2 word-level models.
Model checkers were due until September 1,
updates and benchmarks until September 8.
Results presented in HWMCC session of FMCAD'20.
Kissat in SAT Competition 2020
Our new SAT solver Kissat
won the first place in the main track of
the SAT
Competition 2020.
LIT Lecture Series AI
Computer Science Colloquium
October 1, 2019, JKU Managment Zentrum
2nd floor, MZ 202B, 14:00 - 15:00
Günther
Raidl from TU Wien talks about
Decision
Diagrams in Combinatorial Optimization
in our
colloquium
Hardware Model Checking Competition
2019
Organizing HWMCC'19
affiliated to FMCAD'19
focusing on word-level model checking of BTOR2 models.
Model checkers were due until September 28,
updates and benchmarks until October 13.
IJCAI-JAIR 2019 Award
Computer Science Colloquium
Computer Science Colloquium
CAV 2018 Award
Received prestigious CAV 2018 Award.
Computer Science Colloquium
Computer Science Colloquium
January 18, 2018, Science Park 3, 218, 10:15 - 11:00
Radu Mardare talks
about
Quantitative
Equational Reasoning
in our
colloquium
Hardware Model Checking Competition
2017
Organizing HWMCC'17
affiliated to FMCAD'17.
ETAPS'17 Test of Time Award
Computer Science Colloquium
March 1, 2017, Science Park 3, HS 19, 13:00 - 14:00
Sebastian Gabmeyer talks about
Symbolic
Verification of Graph Transformation Systems
with Hardware Model Checkers
in our
colloquium
Computer Science Colloquium
March 6, 2017, Science Park S2 Z74 13:00 - 14:00
Clifford Wolf talks about
Formal
Verification of Verilog HDL with
Yosys-SMTBMC and SymbiYosys
in our
colloquium
followed by a discussion session from 14:00 - 15:00
JAR Special Issue on Automated Reasoning
Systems
Special issue of JAR on engineering
aspects
of automated reasoning systems.
Submission
deadline is 3 April 2017.
[ webpage | journal ]
Computer Science Colloquium
Computer Science Colloquium
HVC'15 Award
Armin Biere received the
HVC'15 Award
for the most influential work in the last five years
in formal verification, simulation, and testing.
Open PhD and Post-Doc Positions
In our our doctoral college
Logical Methods in Computer
Science (LogiCS)
and in our national research network RiSE
we have several open
positions.
Hardware Model Checking Competition
2015
Organized HWMCC'15
affiliated to FMCAD'15.
New Software Releases
We have a new major release for Boolector,
as well as minor updates for PicoSAT and Quantor.
FLoC'14 Olympic Games
Most Influential Paper Award
Information Electronics Colloquium
Mo Movahed, Fahim Rahim, Hans-Jörg Peter
Atrenta –
Early Design Closure using Formal Methods
Thursday, March 13, Science Park 1, MT 226, 08:30 - 10:00
TAP'14 Conference
Helping to organize 8th conference on
Tests & Proofs (TAP'14).
Hardware Model Checking Competition
2014
CAV'14 Edition
Organizing HWMCC'14 CAV
Edition affiliated to CAV'14.
Part of FLoC Olympic Games
at Vienna Summer of Logic 2014.
Results presented
in second FLoC'14 Olympic Games ceremony.
CAV'14 Conference
Helping to organize 26th conference on
Computer Aided Verification
(CAV'14)
part of Vienna Summer of Logic.
QBF Gallery 2014
Helping to organize QBF Gallery 2014.
ReRISE'14 Winter School
Donald Knuth
older
events
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